Technical Leader (40970)

  • Company:
    Aricent Technologies ( Holdings ) Ltd
  • Location:
  • Salary:
    negotiable / month
  • Job type:
  • Posted:
    2 months ago
  • Category:
    IT-Hardware/Networking | Telecom

Skill: physical design , dft , soc , floorplan; Exp: 5-8 years; Career Opportunities Technical Leader (40970) Req ID40970-Posted28/06/2018-Bangalore-Bangalore Should have5 years experience as an STA engineer. Expert in PTSI, having led MMMC Timing signoff through at least one tapeout for >60M gate hierarchical design in 28nm or lower tech node. Exposure to synthesis & constraints generation/validation would be a definite plus. Should be very familiar with different high speed clock tree architectures (CTS/clock-mesh/H-tree), low power design aspects that impact Timing, noise analysis & fixes, FeedThru planning during Top level SoC Floorplan, DFT mode clock MUXing structures. Expected to be a strong team player with ability to guide & mentor juniors. Very good verbal & written communication skills. MandatorySkills Physical design Experience (In Month) 60 Qualification BE/MTech

Hardware Design


Experience: 5-8

Function: IT Hardware : Hardware Products & Services