Signal Integrity and Timing Analysis (SITA) Engineer

  • Company:
  • Location:
  • Salary:
    negotiable / month
  • Job type:
  • Posted:
    2 months ago
  • Category:
    Software Services | IT-Software

Skill: salary , workforce , it , placement; Exp: 6-11 years; Signal Integrity and Timing Analysis (SITA) Engineer 6 – 11 Years Chennai Job Description About Visteon Visteon is a global company that designs, engineers and manufactures innovative cockpit electronics products and connected car solutions for most of the worlds major vehicle manufacturers. Visteon is a leading provider of instrument clusters, head-up displays, information displays, infotainment, connected audio, and connectivity and telematics; its brands include Lightscape, OpenAir and SmartCore. Headquartered in Van Buren Township, Michigan, Visteon has nearly 11,000 employees at 50 facilities in 19 countries. Visteon had $3.1 billion in electronics sales over the last 12 months. Learn more at Visteon is an equal opportunity employer committed to a culturally diverse workforce. Our Vision A top-three cockpit electronics player delivering a rich, connected cockpit experience for every car from luxury to entry. Primary Responsibilities Creates SITA part of Module Analysis Plan for the project. Verifies IBIS models. Storing and version control of IBIS models Reviews and analyzes Hardware Detail Design Develops Simulation model. Reviews and analyzes hardware schematics – performs Signal Integrity, Power Integrity and Timing Analysis. Develops CES definition and fills the constraints in the corresponding system. Gives recommendation on PCB stack-up. Gives recommended settings for drive strength, termination, slew rate, etc. which are to be included in HSIS and/or Schematic. Reviews and analyzes of critical components placement (Placement Pre-route Analysis). Reviews and analyzes of critical routing (Critical Traces Analysis). Post-route review and analysis. Performs compliance and pre-compliance measurements of high speed interfaces and record results in SITA part of Module Analysis Plan for the project Correlates signal integrity simulations with measurement results. Support Activities include Reviews draft schematic (Hardware Concept TDR). Participates to the alignment meeting between HW, PWB and EMC-SITA, Thermal, Manufacturing and Mechanical teams to agree on the activities performed by each discipline. Support definition of Module Analysis Plan – for Signal Integrity, Power Integrity and Timing Analysis. Review circuit analysis / simulation results Support definition of ECAD Layout Requirements. Authorities SITA Review and Pre-Layout Approval during Pre-Layout Design Review. Approves PWB design (Post-Layout Hardware TDR / Approval) during Post-Layout Review by all related disciplines. Educational qualification BE / ME / MS with Any Specialisation. Experience 6yrs- 11yrs Salary Not Disclosed by Recruiter IndustryIT-Software / Software Services Functional AreaIT Software – Application Programming, Maintenance Role CategoryProgramming & Design RoleSoftware Developer Employment TypePermanent Job, Full Time Key Skills Signal integrity Desired Candidate Profile Please refer to the Job description above Education- PGOther, Post Graduation Not Required Company Profile Visteon Technical and Services Centre Pvt. Ltd.


Degree: ME/ M.Tech./ MS (Engg/ Sciences)

Experience: 6-11

Function: Human Resource / IR / Training & Development